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july 2015 docid027246 rev 2 1 / 14 this is information on a product in full production. www.st.com STL120N8F7 n - channel 80 v, 3.7 m typ., 120 a stripfet? f7 power mosfet in a powerflat? 5x6 package datasheet - production data figure 1: internal schematic diagram features order code v ds r ds(on) max. i d p tot STL120N8F7 80 v 4.4 m 120 a 140 w ? among the lowest r ds(on) on the market ? excellent figure of merit (fom) ? low c rss /c iss ratio for emi immunity ? high avalanche ruggedness applications ? switching applications description this n-channel power mosfet utilizes stripfet ? f7 technology with an enhanced trench gate structure that results in very low on- state resistance, while also reducing internal capacitance and gate charge for faster and more efficient switching. table 1: device summary order code marking package packing STL120N8F7 120n8f7 powerflat? 5x6 tape and reel 56 7 8 1 2 3 4 t op view d(5, 6, 7, 8) g(4) s(1, 2, 3)
contents STL120N8F7 2 / 14 docid0272 46 rev 2 contents 1 electrical ratings ............................................................................. 3 2 electrical characteristics ................................................................ 4 2.1 electrical characteristics (curves) ...................................................... 5 3 test circuits ..................................................................................... 7 4 package information ....................................................................... 8 4.1 powerflat? 5x6 type c package ................................................... 9 4.2 powerflat? 5x6 packing information ........................................... 11 5 revision history ............................................................................ 13
STL120N8F7 electrical ratings docid027246 rev 2 3 / 14 1 electrical ratings table 2: absolute maximum ratings symbol parameter value unit v ds drain - source voltage 80 v v gs gate - source voltage 20 v i d (1) drain current (continuous) at t case = 25 c 120 a drain current (continuous) at t case = 100 c 90 i dm (1) (2) drain current (pulsed) 480 a i d (3) drain current (continuous) at t pcb = 25 c 23 a drain current (continu ous) at t pcb = 100 c 17 i dm (2) (3) drain current (pulsed) 92 a p tot (1) total dissipation at t case = 25 c 140 w p tot ( 3) total dissipation at t pcb = 25 c 4.8 w t stg storage temperature - 55 to 175 c t j operating junction temperature notes: (1) this value is rated according to r thj - c . (2) pulse width is limited by safe operating area. (3) this value is rated accord ing to r thj - pcb table 3: thermal data symbol parameter value unit r thj - pcb (1) thermal resistance junction - pcb 31.3 c/w r thj - case thermal resistance junction - case 1.05 notes: (1) when mounted on a 1 - inch2 fr - 4 board , 2oz cu, t < 10 s
electrical characteristics STL120N8F7 4 / 14 docid027246 rev 2 2 electrical characteristics (t case = 25 c unless otherwise specified) table 4: static symbol parameter test conditions min. typ. max. unit v (br)dss d rain - source breakdown voltage v gs = 0 v, i d = 1 ma 80 v i dss zero gate voltage drain current v gs = 0 v, v ds = 80 v 1 a i gss gate - body leakage current v ds = 0 v, v gs = 20 v 100 na v gs(th) gate threshold voltage v ds = v gs , i d = 250 a 2 4 v r ds(o n) static drain - source on - resistance v gs = 10 v, i d = 11.5 a 3.7 4.4 m table 5: dynamic symbol parameter test conditions min. typ. max. unit c iss input capacitance v ds = 25 v, f = 1 mhz, v gs = 0 v - 4570 - pf c oss output capacitance - 800 - c rss reverse transfer capacitance - 64 - q g total gate charge v dd = 40 v, i d = 23 a, v gs = 10 v (see figure 14: "gate charge test circuit" ) - 60 - nc q gs gate - source charge - 24.7 - q gd gate - drain charge - 14.8 - table 6: switching times symbol parameter test conditions min. typ. max. u nit t d(on) turn - on delay time v dd = 40 v, i d = 11.5 a r g = 4.7 , v gs = 10 v (see figure 13: "switching times test circuit for resistive load" and figure 18: "switching time waveform" ) - 34.5 - ns t r rise time - 16.8 - t d(off) turn - off delay time - 60 - t f fall time - 15.4 - table 7: source-drain diode symbol parameter test conditions min. typ. max. unit v sd (1) forward on voltage v gs = 0 v, i sd = 23 a - 1.2 v t rr reverse recovery time i sd = 23 a, di /dt = 100 a/s, v dd = 64 v (see figure 15: "test circuit for inductive load switching and diode recovery times" ) - 48.6 ns q rr reverse recovery charge - 65.6 nc i rrm reverse recovery current - 2.7 a notes: (1) pul se test: pulse duration = 300 s, duty cycle 1.5%.
STL120N8F7 electrical characteristics docid027246 rev 2 5 / 14 2.1 electrical characteristics (curves) figure 2 : safe operating area figure 3 : thermal impedance figure 4 : output characteristics figure 5 : transfer characteristics figure 6 : gate charge vs gate - source voltage figure 7 : static drain - source on - resistance
electrical characteristics STL120N8F7 6 / 14 docid027246 rev 2 figure 8 : capacitance variations figure 9 : normalized gate threshold voltage vs temperature figure 10 : normalized on - resistan ce vs temperature figure 11 : normalized v(br)dss vs temperature figure 12 : source - drain diode forward characteristics
STL120N8F7 test circuits docid027246 rev 2 7 / 14 3 test circuits figure 13 : switching times test circuit for resistive load figure 14 : gate charge test circuit figure 15 : test circuit for inductive load switchi ng and diode recovery times figure 16 : unclamped inductive load test circuit figure 17 : unclamped inductive waveform figure 18 : switching time waveform
package information STL120N8F7 8 / 14 docid027246 rev 2 4 package informati on in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? sp ecifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark.
STL120N8F7 package information docid027246 rev 2 9 / 14 4.1 powerflat? 5x6 type c package figure 19 : powerflat? 5x6 type c package outline
package information STL120N8F7 10 / 14 docid027246 rev 2 table 8: powerflat? 5x6 type c mechanical data dim. mm min. typ. max. a 0.80 1.00 a1 0.02 0.05 a2 0.25 b 0.30 0.50 d 5.20 e 6.15 d2 4.11 4.31 e2 3.50 3.70 e 1.27 e1 0.65 l 0.715 1. 015 k 1.05 1.35 e3 2.35 2.55 e4 0.40 0.60 e5 0.08 0.28 figure 20 : powerflat? 5x6 recommended footprint (dimensions are in mm)
STL120N8F7 package information docid027246 rev 2 11 / 14 4.2 powerflat? 5x6 packing information figure 21 : powerflat? 5x6 tape (dimensions are in mm) figure 22 : powerflat? 5x6 package orientation in carrier tape
package information STL120N8F7 12 / 14 docid027246 rev 2 figure 23 : powerflat? 5x6 reel
STL120N8F7 revision history docid027246 rev 2 13 / 14 5 revision history table 9: document revision history date revision changes 09 - dec - 2014 1 first release. 27 - jul - 2015 2 text and formatting changes throughout document. datas heet status promoted from preliminary data to production data. in section electrical characteristics : - updated tables dynamic , switching times and source - drain diode - added section electrical characteristics (curves)
STL120N8F7 14 / 14 docid027246 rev 2 important notice C please read carefully stmicroelectronics nv and its subsidiaries (st) reserve the right to make changes, corrections, enhancements, modifications , and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant information on st products before placing orders. st products are sold pursuant to sts terms and conditions of sale in place at the time of or der acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and st assumes no liability for applicati on assistance or the design of purchasers products. no license, express or implied, to any intellectual property right is grant ed by st herein. resale of st products with provisions different from the information set forth herein shall void any warranty granted by st f or such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2015 stmicroelectronics C all rights reserved

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